Michael Shebanow, a renowned leader in semiconductor design, propels SAPEON's expansion in the global AI arena with over 35 years of robust experience in CPU, GPU, and NPU projects. His careers began at Motorola as a Processor Architect and took him to Cyrixs as manager of the M3 CPU and to Hal Computer Systems as CTO & VP, overseeing CPU manufacturing and a team of over 200. His journey continued at AMD, where he led a team working on low-power CPUs (K10). 

Transitioning to GPUs, as a Principal Architect at NVIDIA, he had a significant role in GPU design working on G80, Fermi, and Kepler. On Fermi, he led the architecture group defining the architecture of the SM for NVIDIA's first CUDA-targeted GPU. At Samsung Electronics, Michael supervised mobile graphics semiconductor IP for five years as a VP and Lab head, creating APL (Advanced Processor Lab). He continued his career post-GPU at Cadence as a VP of Engineering, managing the Tensilica product line and shipping Tensilica's first custom AI inference engine. 

Michael received his Ph.D. degree in Electrical Engineering & Computer Sciences from the University of California, Berkeley. He is also an IEEE fellow, recognized for his significant contribution to the development of out-of-order superscalar CPUs. With his solid expertise and innovative leadership, Michael continues to guide SAPEON's progression in the global AI landscape, driving cutting-edge semiconductor design and ensuring a bright future for AI technology.